This invention relates to a fetching apparatus for fetching data from a main memory to supply the data to a central processing unit and, more particularly, to a fetching apparatus for use in processing data at a high speed.
In general, an information or data processing equipment comprises a central processing unit or a processor and a main memory. The main memory may comprise a plurality of memory areas each of which has a predetermined memory size. Each of the memory areas is for memorizing a plurality of data as memorized data. Each of the memory areas may be called a page.
In such a data processing equipment, a cache or buffer memory may be located between the processor and the main memory in order to carry out a memory access at a high speed. In the case where the processor needs a particular data memorized in the main memory, the cache memory fetches, as a fetched page data block, a content of a page including the particular data. In order to obtain the particular data, the processor accesses the cache memory instead of the main memory.
In a data processing apparatus, the processor may need an additional data which is not in includes in the fetched page data block. The cache memory again fetches, as an additional fetched page data block, a content of an additional page including the additional data. In order to obtain the additional data, the processor accesses the cache memory.
As described above, it is necessary for the cache memory to frequently carry out a fetching operation when the fetched page data block does not include the data which the processor needs. In cases where the cache memory frequently carries out the fetching operation, it is difficult to carry out the data access at the high speed.
Furthermore, the cache memory has a memory capacity for the fetched page data block. The fetched page data block may have unused data. Taking the unused data into consideration, it is necessary to determine the memory capacity. It is difficult to effectively use the cache memory.